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Merge branch 'geronet1-development03' into development03

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lumapu 2024-01-17 22:25:44 +01:00
commit ba76224cc0
3 changed files with 16 additions and 6 deletions
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10
src/config/config.h
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@ -114,6 +114,16 @@
#define DEF_NRF_SCLK_PIN 18
#endif
#if defined(ETHERNET)
#ifndef DEF_CMT_SPI_HOST
#define DEF_CMT_SPI_HOST SPI3_HOST
#endif
#else
#ifndef DEF_CMT_SPI_HOST
#define DEF_CMT_SPI_HOST SPI2_HOST
#endif
#endif /* defined(ETHERNET) */
#ifndef DEF_CMT_SCLK
#define DEF_CMT_SCLK 12
#endif

2
src/hms/cmtHal.h
View file

@ -17,7 +17,7 @@
class cmtHal : public SpiPatcherHandle {
public:
cmtHal() {
mSpiPatcher = SpiPatcher::getInstance(SPI2_HOST);
mSpiPatcher = SpiPatcher::getInstance(DEF_CMT_SPI_HOST);
}
void patch() override {

10
src/hms/esp32_3wSpi.h
View file

@ -21,7 +21,7 @@
// for ESP32 this is the so-called HSPI
// for ESP32-S2/S3/C3 this nomenclature does not really exist anymore,
// it is simply the first externally usable hardware SPI master controller
#define SPI_CMT SPI2_HOST
//#define SPI_CMT SPI2_HOST
class esp32_3wSpi {
public:
@ -54,8 +54,8 @@ class esp32_3wSpi {
.post_cb = NULL,
};
ESP_ERROR_CHECK(spi_bus_initialize(SPI_CMT, &buscfg, SPI_DMA_DISABLED));
ESP_ERROR_CHECK(spi_bus_add_device(SPI_CMT, &devcfg, &spi_reg));
ESP_ERROR_CHECK(spi_bus_initialize(DEF_CMT_SPI_HOST, &buscfg, SPI_DMA_DISABLED));
ESP_ERROR_CHECK(spi_bus_add_device(DEF_CMT_SPI_HOST, &devcfg, &spi_reg));
// FiFo
spi_device_interface_config_t devcfg2 = {
@ -72,9 +72,9 @@ class esp32_3wSpi {
.pre_cb = NULL,
.post_cb = NULL,
};
ESP_ERROR_CHECK(spi_bus_add_device(SPI_CMT, &devcfg2, &spi_fifo));
ESP_ERROR_CHECK(spi_bus_add_device(DEF_CMT_SPI_HOST, &devcfg2, &spi_fifo));
esp_rom_gpio_connect_out_signal(pinSdio, spi_periph_signal[SPI_CMT].spid_out, true, false);
esp_rom_gpio_connect_out_signal(pinSdio, spi_periph_signal[DEF_CMT_SPI_HOST].spid_out, true, false);
delay(100);
//pinMode(pinGpio3, INPUT);