fix yield total correction as module (inverter input) value #570

This commit is contained in:
lumapu 2023-02-12 12:40:31 +01:00
parent ca25f16548
commit 32daf4f8ea
3 changed files with 5 additions and 2 deletions

View file

@ -256,7 +256,7 @@ class Inverter {
// temperature is a signed value!
rec->record[pos] = (REC_TYP)((int16_t)val) / (REC_TYP)(div);
} else if (FLD_YT == rec->assign[pos].fieldId) {
rec->record[pos] = ((REC_TYP)(val) / (REC_TYP)(div)) + ((REC_TYP)config->yieldCor[rec->assign[pos].ch]);
rec->record[pos] = ((REC_TYP)(val) / (REC_TYP)(div)) + ((REC_TYP)config->yieldCor[rec->assign[pos].ch-1]);
} else {
if ((REC_TYP)(div) > 1)
rec->record[pos] = (REC_TYP)(val) / (REC_TYP)(div);